Design of bioinspired tripartite synapse analog integrated circuit in 65-nm CMOS Technology

被引:4
|
作者
Tir, Shohreh [1 ]
Shalchian, Majid [1 ]
Moezzi, Mohsen [1 ]
机构
[1] Amirkabir Univ Technol, Dept Elect Engn, Tehran, Iran
关键词
Neuron-astrocyte interactions; Tripartite synapse; Morris-Lecar neuron model; Postnov astrocyte model; Neuromorphic CMOS analog implementation; ASTROCYTE; IMPLEMENTATION; GLIA;
D O I
10.1007/s10825-020-01514-5
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents the design of a bioinspired synaptic integrated circuit, which takes into account the interactions of astrocyte in a tripartite synapse. These interactions result in activation of Ca2+ ion waves through fast and slow activation pathways which affect the synapse and postsynaptic neuron. The circuit has been implemented in TSMC 65-nm CMOS technology with 1.2 V supply voltage. Dynamic and nonlinear characteristics of the interactions have been implemented based on nonlinear characteristics of field effect transistors and few external capacitors. This design used few components from previous works, including ML neuron and Ca2+ circuit. All components are scaled to 65 nm and implemented in weak inversion operating region. Simulation results confirm that the proposed circuit demonstrates the functionality of physical model with acceptable relative mean square error and low power consumption of about 37 nW. The effects of supply voltage sensitivity, variability of threshold voltage and noise on the Ca2+ circuit have been studied. Circuit layout for main components including presynaptic neuron, postsynaptic neuron and the synapse has been prepared, with the area of 80 mu m(2). Post-layout simulation of the neuron with parasitics demonstrates the feasibility of the proposed model for fabrication. This circuit structure can be used for the study and demonstration of various functionalities associated with astrocyte including self-repair.
引用
收藏
页码:1313 / 1328
页数:16
相关论文
共 50 条
  • [21] A universal low-noise analog receiver baseband in 65-nm CMOS
    Tekin, Ahmet
    Elwan, Hassan
    Pedrotti, Kenneth
    ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING, 2010, 65 (02) : 225 - 238
  • [22] Highly Reconfigurable Analog Baseband for Multistandard Wireless Receivers in 65-nm CMOS
    Wang, Yixiao
    Ye, Le
    Liao, Huailin
    Huang, Ru
    Wang, Yangyuan
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-EXPRESS BRIEFS, 2015, 62 (03) : 296 - 300
  • [23] A universal low-noise analog receiver baseband in 65-nm CMOS
    Ahmet Tekin
    Hassan Elwan
    Kenneth Pedrotti
    Analog Integrated Circuits and Signal Processing, 2010, 65 : 225 - 238
  • [24] Design of a Voltage-Controlled Programmable-Gain Amplifier in 65-nm CMOS Technology
    Liu, Hang
    Zhu, Xi
    Lu, Muting
    Yeo, Kiat Seng
    2019 IEEE MTT-S INTERNATIONAL MICROWAVE SYMPOSIUM (IMS), 2019, : 87 - 90
  • [25] An SEU-Resilient SRAM Bitcell in 65-nm CMOS Technology
    Chen, Qingyu
    Wang, Haibin
    Chen, Li
    Li, Lixiang
    Zhao, Xing
    Liu, Rui
    Chen, Mo
    Li, Xuantian
    JOURNAL OF ELECTRONIC TESTING-THEORY AND APPLICATIONS, 2016, 32 (03): : 385 - 391
  • [26] A 300-GHz Fundamental Oscillator in 65-nm CMOS Technology
    Razavi, Behzad
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2011, 46 (04) : 894 - 903
  • [27] An SEU-Resilient SRAM Bitcell in 65-nm CMOS Technology
    Qingyu Chen
    Haibin Wang
    Li Chen
    Lixiang Li
    Xing Zhao
    Rui Liu
    Mo Chen
    Xuantian Li
    Journal of Electronic Testing, 2016, 32 : 385 - 391
  • [28] A 130-GHz OOK Transmitter in 65-nm CMOS Technology
    Kim, Namhyung
    Son, Heekang
    Kim, Dong-Hyun
    Rieh, Jae-Sung
    2016 IEEE 16TH TOPICAL MEETING ON SILICON MONOLITHIC INTEGRATED CIRCUITS IN RF SYSTEMS (SIRF), 2016, : 113 - 115
  • [29] A Fully Integrated Phase-Locked Loop with Leakage Current Compensation in 65-nm CMOS Technology
    Park, Se-Chun
    Park, Seung-Baek
    Kim, Soo-Won
    2015 IEEE INTERNATIONAL CONFERENCE ON CONSUMER ELECTRONICS (ICCE), 2015, : 587 - 588
  • [30] A 300-GHz Fundamental Oscillator in 65-nm CMOS Technology
    Razavi, Behzad
    2010 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2010, : 113 - 114