共 11 条
[3]
Cui HX, 2019, IEEE INT SYMP CIRC S
[9]
Flexible, Cost-Efficient, High-Throughput Architecture for Layered LDPC Decoders with Fully-Parallel Processing Units
[J].
19TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN (DSD 2016),
2016,
:230-237