Generation of Multi-Cycle Broadside Tests

被引:19
|
作者
Pomeranz, Irith [1 ]
机构
[1] Purdue Univ, Sch Elect & Comp Engn, W Lafayette, IN 47907 USA
关键词
Broadside tests; functional broadside tests; multi-pattern tests; transition faults;
D O I
10.1109/TCAD.2011.2138470
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The use of multi-cycle (or multi-pattern) tests for delay faults can reduce the number of clock cycles required for test application, and enhance the ability of a test set to detect delay defects. This is achieved by exercising the circuit in functional mode for several clock cycles as part of each test. This advantage is especially important for multi-pattern functional broadside tests, which guarantee normal functional operation conditions during the functional clock cycles of the test. This paper describes a procedure for generating multi-pattern broadside tests. The procedure extends a two-pattern test set gradually to increase the number of patterns included in each test while reducing the number of tests. Experimental results demonstrate that significant reductions in the numbers of clock cycles are possible with the proposed procedure for both functional and arbitrary broadside test sets.
引用
收藏
页码:1253 / 1257
页数:5
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