Hardware/Software Partitioning of Embedded System-on-Chip Applications

被引：0

作者：

Tang, Jia Wei ^{[1
]}

Hau, Yuan Wen ^{[2
]}

Marsono, M. N. ^{[1
]}

机构：

[1] Univ Teknol Malaysia, Fac Elect Engn, Johor Baharu, Johor, Malaysia

[2] Univ Teknol Malaysia, Fac Biosci & Med Engn, Johor Baharu, Johor, Malaysia

来源：

2015 IFIP/IEEE INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSI-SOC) | 2015年

关键词：

Embedded system; hardware/software partitioning; streaming applications; ALGORITHMIC ASPECTS;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

HW/SW partitioning is an important development step during HW/SW co-design to ensure application performance in embedded System-on-Chip (SoC). This paper formulates the optimization of HW/SW partitioning aiming at maximizing streaming throughput with predefined area constraint, targeted for multi-processor system with hardware accelerator sharing capability. Two software-oriented and the second hardware-oriented greedy heuristic algorithms for HW/SW partitioning are proposed and tested on several random graphs and one multimedia application (MP3 decoder). Results show that the best result from both proposed greedy algorithms produce 93.6% near-optimal solution compared to brute force ground truth with faster HW/SW partitioning time.

引用

页码：331 / 336

页数：6

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