Line Tunneling Dominating Charge Transport in SiGe/Si Heterostructure TFETs

This paper provides an experimental proof that both the ON-current I-ON and the subthreshold swing SS of Si(Ge)-based tunneling FETs (TFETs) drastically benefit from device architectures promoting line tunneling aligned with the gate electrical field. A novel SiGe/Si heterostructure TFET is fabricated, making use of a selective and self-adjusted silicidation, thus enlarging the area for band-to-band-tunneling (BTBT) in a region directly underneath the gate. In addition, a counter-doped pocket within the SiGe layer at the source tunnel junction is introduced in order to sharpen the corresponding doping profile and, consequently, to shorten the resulting tunneling length. Experimental analysis of activation energies E-a identifies BTBT, dominating the drain current I-d in the SiGe/Si heterostructure TFET over a wide region of the gate voltage V-g, thus reducing parasitic influence of Shockley-Read-Hall recombination and trap-assisted tunneling. Both a relatively high I-ON = 6.7 mu A/mu m at a supply voltage V-DD = 0.5 V and an average SS of about 80 mV/decade over four orders of magnitude of I-d were achieved.