Noise-resilient and high-speed deep learning with coherent silicon photonics

The challenge of high-speed and high-accuracy coherent photonic neurons for deep learning applications lies to solve noise related issues. Here, Mourgias-Alexandris et al. address this problem by introducing a noise-resilient hardware architectural and a deep learning training platform. The explosive growth of deep learning applications has triggered a new era in computing hardware, targeting the efficient deployment of multiply-and-accumulate operations. In this realm, integrated photonics have come to the foreground as a promising energy efficient deep learning technology platform for enabling ultra-high compute rates. However, despite integrated photonic neural network layouts have already penetrated successfully the deep learning era, their compute rate and noise-related characteristics are still far beyond their promise for high-speed photonic engines. Herein, we demonstrate experimentally a noise-resilient deep learning coherent photonic neural network layout that operates at 10GMAC/sec/axon compute rates and follows a noise-resilient training model. The coherent photonic neural network has been fabricated as a silicon photonic chip and its MNIST classification performance was experimentally evaluated to support accuracy values of >99% and >98% at 5 and 10GMAC/sec/axon, respectively, offering 6x higher on-chip compute rates and >7% accuracy improvement over state-of-the-art coherent implementations.