Low energy boron implantation in silicon and room temperature diffusion

In the semiconductor industry Complementary Metal Oxide Semiconductor Technology is the main stream. The continuing trend towards reduction of the transistor gate length allows for more complex integrated circuits. This puts stringent demands on other transistor properties such as source and drain junction depth. Source and drain are formed using ion implantation. For transistors where source and drain are boron-doped very low implantation energies are needed to obtain shallow implantation profiles. We have characterized boron implants, concentrating on the 100 eV to 1 keV energy range. As-implanted and annealed implant profiles are presented together with an overview of electrical activation and sheet resistance showing that ion implantation is a viable technique for shallow source/drain formation. In this paper some of the mechanisms underlying the formation of implantation profiles are discussed. Using a deactivation technique, we have measured the room temperature silicon self-interstitial diffusivity, D-I. It was found to be at least 10(-7) cm(2) s(-1). This appears to be a new record experimental value, approaching theoretical values for the silicon di-interstitial. Room temperature migration and clustering behaviour of implanted boron has been investigated by performing ion implantation of the boron isotope B-11 into Molecular Beam Epitaxy-grown in situ doped layers. We, for the first time, show that a fraction of the implanted boron migrates deep into the bulk of the Si with substitutional B-10 acting as trap centers for migrating B-11. (C) 1998 Elsevier Science B.V.