A short-channel polycrystalline silicon (poly-Si) thin-film transistor (W/L=10 mum/3 mum) with an ultrathin channel (30 nm) and self-aligned tungsten-clad source/drain structure is demonstrated. With WF6 and SiH4 gas flow ratio of 40/12, selectively deposited tungsten film over 100 nm thick can be easily grown on source/drain regions. As a result, the parasitic source/drain resistance is greatly reduced, leading to improvement of device driving ability. Because tungsten deposition can be carried out at a low processing temperature of 300degreesC, the proposed simple structure is compatible with conventional top-gate structure and can be readily applied to low-temperature poly-Si fabrication. (C) 2003 The Electrochemical Society.
机构:
NTT, Low Energy LSI Dev Project, Telecommun Energy Labs, Atsugi, Kanagawa 2430198, JapanNTT, Low Energy LSI Dev Project, Telecommun Energy Labs, Atsugi, Kanagawa 2430198, Japan
Takahashi, M
Takayama, K
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机构:NTT, Low Energy LSI Dev Project, Telecommun Energy Labs, Atsugi, Kanagawa 2430198, Japan
机构:
NTT, Low Energy LSI Dev Project, Telecommun Energy Labs, Atsugi, Kanagawa 2430198, JapanNTT, Low Energy LSI Dev Project, Telecommun Energy Labs, Atsugi, Kanagawa 2430198, Japan
Takahashi, M
Takayama, K
论文数: 0引用数: 0
h-index: 0
机构:NTT, Low Energy LSI Dev Project, Telecommun Energy Labs, Atsugi, Kanagawa 2430198, Japan