Cell broadband engine processor design methodology

被引：0

作者：

Takahashi, O. ^{[1
]}

Behnen, E. ^{[1
]}

Cottier, S. R. ^{[1
]}

Coulman, P. ^{[1
]}

Dhong, S. H. ^{[1
]}

Flachs, B. ^{[1
]}

Hofstee, P. ^{[1
]}

Johnson, C. J. ^{[1
]}

Posluszny, S. ^{[1
]}

机构：

[1] IBM Syst & Technol Grp, Austin, TX USA

来源：

PROCEEDINGS OF THE IEEE 2007 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2007年

关键词：

D O I：

10.1109/CICC.2007.4405830

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The Cell BE design methodology is described which enables high frequency, high performance, power efficient, and area optimized design. It includes a hierarchical design style, clean clock boundary, effective use of non-scan latches, at-speed scan testing, custom design like synthesized macro, fine grained clock gating scheme, and cycle accurate power analysis.

引用

页码：711 / 716

页数：6

共 50 条

[31] Design of a decompressor engine on a SPARC processor
Billo, E
Azevedo, R
Araujo, G
Centoducatte, R
Netto, EW
SBCCI 2005: 18TH SYMPOSIUM ON INTEGRATED CIRCUITS AND SYSTEMS DESIGN, PROCEEDINGS, 2005, : 110 - 114
[32] A holistic methodology for network processor design
Bonorden, O
Brüls, N
Kastens, U
Le, DK
Heide, FMAD
Niemann, JC
Porrmann, M
Rückert, U
Slowik, A
Thies, M
LCN 2003: 28TH CONFERENCE ON LOCAL COMPUTER NETWORKS, PROCEEDINGS, 2003, : 583 - 592
[33] A methodology to design a multimedia processor core
Ramazani, A
Monteiro, E
Dandache, A
Lepley, B
ICECS 2003: PROCEEDINGS OF THE 2003 10TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3, 2003, : 998 - 1001
[34] Design of an Automatic Target Recognition Algorithm on the IBM Cell Broadband Engine
Che, Weijia
Chatha, Karam S.
21ST IEEE INTERNATIONAL CONFERENCE ON APPLICATION-SPECIFIC SYSTEMS, ARCHITECTURES AND PROCESSORS, 2010,
[35] A methodology to design a multimedia processor core
1600, Emirates Telecommunications Corporation (ETISALAT); Etisalat College of Engineering (ECE); IEEE Circuits and Systems Society (CAS); Institute of Electrical and Electronics Engineers (IEEE); University of Sharjah (UOS) (Institute of Electrical and Electronics Engineers Inc., United States):
[36] Real-time mutual-information-based linear registration on the Cell Broadband Engine processor
Ohara, Moriyoshi
Yeo, Hangu
Savino, Frank
Iyengar, Giridharan
Gong, Leiguang
Inoue, Hiroshi
Komatsu, Hideaki
Sheinin, Yadim
Daijavad, Shahrokh
Ericksons, Bradley
2007 4TH IEEE INTERNATIONAL SYMPOSIUM ON BIOMEDICAL IMAGING : MACRO TO NANO, VOLS 1-3, 2007, : 33 - +
[37] Low power methodology and design techniques for processor design
Brennan, JP
Dean, A
Kenyon, S
Ventrone, S
1998 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN - PROCEEDINGS, 1998, : 268 - 273
[38] Implementation of NAMD molecular dynamics non-bonded force-field on the Cell Broadband Engine processor
Shi, Guochun
Kindratenko, Volodymyr
2008 IEEE INTERNATIONAL SYMPOSIUM ON PARALLEL & DISTRIBUTED PROCESSING, VOLS 1-8, 2008, : 2985 - 2992
[39] Sorting On A Cell Broadband Engine SPU
Bandyopadhyay, Shibdas
Sahni, Sartaj
ISCC: 2009 IEEE SYMPOSIUM ON COMPUTERS AND COMMUNICATIONS, VOLS 1 AND 2, 2009, : 218 - 223
[40] Research on TLB design methodology of embedded processor
Fan, Dong-Rui
Huang, Hai-Lin
Tang, Zhi-Min
Jisuanji Xuebao/Chinese Journal of Computers, 2006, 29 (01): : 73 - 80

← 1 2 3 4 5 →