RV-CAP: Enabling Dynamic Partial Reconfiguration for FPGA-Based RISC-V System-on-Chip

Partial reconfiguration is remaining the core technique to build adaptive systems-on-chip (SoCs) for modern FPGA architectures. Current support for reconfiguration management targets a few adaptive SoC architectures. Therefore, the adoption of a new instruction set architecture like RISC-V to manage the reconfiguration process requires the development of suitable reconfiguration management along with the needed hardware and software modules. In this work, we present a solution to enable partial reconfiguration for FPGA-based RISC-V SoC. The developed RV-CAP controller consists of hardware modules and a set of improved software drivers to ease the reconfiguration process from the RISC-V processor. Our dynamic partial reconfiguration controller achieves a high reconfiguration throughput of 398.1 MB/s with low resource utilization overhead. The proposed reconfiguration management is implemented and evaluated using Xilinx Kintex-7 FPGA with the ability to be portable for any other Xilinx FPGAs supporting partial reconfiguration. Our goal is to enable open-source soft-core RISC-V processors to manage and interact with reconfigurable hardware accelerators on FPGA-based SoCs.