A survey of problems, solution techniques, and future challenges in scheduling semiconductor manufacturing operations

被引:311
作者
Moench, Lars [1 ]
Fowler, John W. [2 ]
Dauzere-Peres, Stephane [3 ]
Mason, Scott J. [4 ]
Rose, Oliver [5 ]
机构
[1] Univ Hagen, Dept Math & Comp Sci, D-58097 Hagen, Germany
[2] Arizona State Univ, Sch Comp Informat & Decis Syst Engn, Tempe, AZ 85287 USA
[3] Ecole Mines St Etienne, Dept Mfg Sci & Logist, F-13541 Gardanne, France
[4] Clemson Univ, Dept Ind Engn, Clemson, SC 29634 USA
[5] Tech Univ Dresden, Inst Appl Comp Sci, D-01062 Dresden, Germany
关键词
Scheduling; Semiconductor manufacturing; Survey; TOTAL WEIGHTED TARDINESS; BATCH-PROCESSING MACHINE; INCOMPATIBLE JOB FAMILIES; WAFER FABRICATION; GENETIC ALGORITHM; MULTIPLE ORDERS; DISPATCHING RULES; PROBLEM REDUCTION; MAXIMUM LATENESS; DECISION-MAKING;
D O I
10.1007/s10951-010-0222-9
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
In this paper, we discuss scheduling problems in semiconductor manufacturing. Starting from describing the manufacturing process, we identify typical scheduling problems found in semiconductor manufacturing systems. We describe batch scheduling problems, parallel machine scheduling problems, job shop scheduling problems, scheduling problems with auxiliary resources, multiple orders per job scheduling problems, and scheduling problems related to cluster tools. We also present important solution techniques that are used to solve these scheduling problems by means of specific examples, and report on known implementations. Finally, we summarize some of the challenges in scheduling semiconductor manufacturing operations.
引用
收藏
页码:583 / 599
页数:17
相关论文
共 123 条
[1]   THE SHIFTING BOTTLENECK PROCEDURE FOR JOB SHOP SCHEDULING [J].
ADAMS, J ;
BALAS, E ;
ZAWACK, D .
MANAGEMENT SCIENCE, 1988, 34 (03) :391-401
[2]   A survey of automated material handling systems in 300-mm semiconductor fabs [J].
Agrawal, GK ;
Heragu, SS .
IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, 2006, 19 (01) :112-120
[3]   A sequential solution methodology for capacity allocation and lot scheduling problems for photolithography [J].
Akçali, E ;
Uzsoy, R .
TWENTY SIXTH IEEE/CPMT INTERNATIONAL ELECTRONICS MANUFACTURING TECHNOLOGY SYMPOSIUM, PROCEEDINGS, 2000, :374-381
[4]   Cycle-time improvements for photolithography process in semiconductor manufacturing [J].
Akçali, E ;
Nemoto, K ;
Uzsoy, R .
IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, 2001, 14 (01) :48-56
[5]  
[Anonymous], P 16 EUR SIM S
[6]  
[Anonymous], 2004, INT J APPL MANAGEMEN
[7]  
[Anonymous], P IEEE INT C IND ENG
[8]  
[Anonymous], INT J PRODUCTION RES
[9]  
[Anonymous], INT J PRODUCTION RES
[10]  
[Anonymous], P INT C MOD AN SEM M