Analysis of an ESD Suppressor Used for IC Protection

被引：0

作者：

Kuo, Cheng-Ta ^{[1
]}

Chen, Hsing-Yi ^{[1
]}

Suo, Ying ^{[2
]}

Qiu, Jinghui ^{[2
]}

机构：

[1] Yuan Ze Univ, Dept Commun Engn, 135 Yuan Tung Rd, Chungli 32003, Taoyuan Shian, Taiwan

[2] Harbin Inst Technol, Dept Microwave Engn, Harbin 150001, Peoples R China

来源：

2010 IEEE ANTENNAS AND PROPAGATION SOCIETY INTERNATIONAL SYMPOSIUM | 2010年

关键词：

SIMULATOR; EMP;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The time-domain moment method was successfully used to analyze the capacitance, the electric field, and the electrostatic discharge (ESD) current of an ESD suppressor used for integrated circuit (IC) protection. The obtained capacitance of this ESD suppressor was also validated by measurement data. From simulation results, it is found that the maximum electric field of 354000 kV/m occurs at 2 ns which is much higher than the threshold electric field of 2900 kV/m for air breakdown. The ESD current with pulse waveform has a maximum value of 4.7 mA at 0.2 ns and has a very short duration time of about 20 ns before the ESD current approaches zero.

引用

页数：4

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