Collision-free interleavers using Latin squares for parallel decoding of turbo codes

被引:1
作者
Oh, Hyun-Young [1 ]
Kim, Dae-Son [1 ]
Kim, Joon-Sung [1 ]
Song, Hong-Yeop [1 ]
机构
[1] Yonsei Univ, Dept Elect & Elect Engn, Coding & Informat Theory Lab, CITY Ctr Informat Technol, Seoul 120749, South Korea
来源
2007 IEEE 65TH VEHICULAR TECHNOLOGY CONFERENCE, VOLS 1-6 | 2007年
关键词
turbo codes; parallel architecture; collision-free; interleaver; temporal permutation; spatial permutation;
D O I
10.1109/VETECS.2007.331
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In the parallel decoding of turbo codes, the constituent interleaver must avoid the memory collision. This paper proposes a collision-free interleaver structure which can be optimized easily over various information blocksizes. The performance of the proposed interleaver is almost the same as or 0.1dB loss against almost regular permutation (ARP) at FER 10(-5) region with information block sizes of 320 and 640 when the simulation environment is given by the 3GPP standard turbo codes with 4 parallelism in AWGN channel.
引用
收藏
页码:1589 / 1592
页数:4
相关论文
共 14 条
[1]  
*3GPP, 3GPP TSG RAN WGI 43
[2]  
*3GPP, 2000, TS 25 212 V3 4 0
[3]   Tailbiting MAP decoders [J].
Anderson, JB ;
Hladik, SM .
IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS, 1998, 16 (02) :297-302
[4]   OPTIMAL DECODING OF LINEAR CODES FOR MINIMIZING SYMBOL ERROR RATE [J].
BAHL, LR ;
COCKE, J ;
JELINEK, F ;
RAVIV, J .
IEEE TRANSACTIONS ON INFORMATION THEORY, 1974, 20 (02) :284-287
[5]   Designing good permutations for turbo codes:: Towards a single model [J].
Berrou, C ;
Saouter, Y ;
Douillard, C ;
Kerouédan, S ;
Jézéquel, M .
2004 IEEE INTERNATIONAL CONFERENCE ON COMMUNICATIONS, VOLS 1-7, 2004, :341-345
[6]  
BERROU C, 1993, IEEE INTERNATIONAL CONFERENCE ON COMMUNICATIONS 93 : TECHNICAL PROGRAM, CONFERENCE RECORD, VOLS 1-3, P1064, DOI 10.1109/ICC.1993.397441
[7]  
CHU WS, 2006, CRC HHDB COMBINATION, pCH63
[8]  
COLBOURN CJ, 1996, CRC DISCR MATH APPL, P97
[9]   Variable-size interleaver design for parallel turbo decoder architectures [J].
Dinoi, L ;
Benedetto, S .
IEEE TRANSACTIONS ON COMMUNICATIONS, 2005, 53 (11) :1833-1840
[10]   Parallel turbo coding interleavers: avoiding collisions in accesses to storage elements [J].
Giulietti, A ;
van der Perre, L ;
Strum, M .
ELECTRONICS LETTERS, 2002, 38 (05) :232-234