Annealing Temperature Optimization for High-Performance Carbon Nanotube Thin Film Transistors

被引：0
|
作者：
Deng, Yanyan [1 ]
Wu, Yucui [1 ]
Zhang, Min [1 ]
机构：
[1] Peking Univ, Sch Elect & Comp Engn, Shenzhen, Peoples R China
来源：
PROCEEDINGS OF THE 2015 IEEE INTERNATIONAL CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS (EDSSC) | 2015年
关键词：
Carbon nanotube thin film transistors (CNT-TFTs); annealing temperature; I-on/I-off ratio; mobility; total resistance; contact resistance; channel resistance;
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The effect of annealing treatment on the device performance of carbon nanotube thin film transistors (CNT-TFTs) have been investigated systematically. The optimized annealing temperature has been found out from the tradeoff between source-drain total resistance and on-off current ratio, resulting in high-performance CNT-TFTs with a typical I-on/I-off larger than 10(6), a subthreshold swing as low as 140 mV/dec and a threshold voltage of -0.2 V. When the annealing temperature increased from 300 degrees C to 400 degrees C, the device mobility reached 9.7 cm(2)/vs while I-on/I-off decreased to 10(5). After annealing of 450 degrees C or above, the off current increased abruptly due to the appearance of metallic nanotube pathways, which can be improved by the electrical breakdown.
引用
收藏
页码：672 / 675
页数：4
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