A Simple Ultra-Low Power Opamp in 22 nm FDSOI

被引：0
|
作者：
Kuzmicz, Wieslaw [1 ]
机构：
[1] Warsaw Univ Technol, Inst Microelect & Optoelect, Warsaw, Poland
来源：
PROCEEDINGS OF THE 2019 26TH INTERNATIONAL CONFERENCE MIXED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS (MIXDES 2019) | 2019年
关键词：
FDSOI; low-power circuit design; low noise; noise efficiency factor; AMPLIFIER;
D O I：
10.23919/mixdes.2019.8787017
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
An ultra-low power opamp is described. The amplifier has been designed and prototyped in 22nm CMOS FDSOI technology. Very low current consumption (1.1 mu A at V-DD=0.8V) and very low area (0.0277 mm(2)) make it suitable for multichannel bio signal recording arrays. Noise efficiency factor of 3.3 has been achieved. A unique feature of this opamp architecture is a negative feedback loop from the output to the body of an input transistor, which serves as a second gate. This circuit technique, possible only in FDSOI technology, allows to achieve perfectly linear voltage transfer curve while leaving both signal inputs of the amplifier free.
引用
收藏
页码：167 / 170
页数：4
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