Optimisation and fabrication of low-stress, low-temperature silicon oxide cantilevers

被引:5
作者
Kshirsagar, A. [1 ]
Duttagupta, S. P. [1 ]
Gangal, S. A. [2 ]
机构
[1] Indian Inst Technol, Dept Elect Engn, Ctr Excellence Nanoelect, Bombay 400076, Maharashtra, India
[2] Univ Pune, Dept Elect Sci, Pune 411007, Maharashtra, India
来源
MICRO & NANO LETTERS | 2011年 / 6卷 / 07期
关键词
CHEMICAL-VAPOR-DEPOSITION; INTEGRATION; NITRIDE; FILMS;
D O I
10.1049/mnl.2011.0076
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
Modern lab-on-a-chip systems can benefit from integration of nanoelectromechanical system/microelectromechanical system (NEMS/MEMS) and complementary metal-oxide semiconductor technology with emphasis on low temperature processing. In the present work process, parameters for deposition of silicon oxide (SiO(x)) by inductively coupled plasma chemical vapour deposition (ICPCVD) at low temperature (70 degrees C) are optimised. The sacrificial layer poly(methyl methacrylate) (PMMA) is in-house prepared and optimised. This PMMA sacrificial solution not only gives a low cost wide range of viscosity solutions, but it is also low temperature NEMS process compatible. With optimisations mentioned above, it has been possible to fabricate the whole device without exceeding the thermal budget 100 degrees C. To the best of the authors' knowledge, this is the first report on sub-100 degrees C, surface micromachined SiO(x) cantilevers deposited by ICPCVD and using PMMA as the sacrificial layer for low temperature NEMS applications.
引用
收藏
页码:476 / 481
页数:6
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