Assessment of paper-based MoS2 FET for Physically Unclonable Functions

被引:5
作者
Vatalaro, Massimo [1 ]
De Rose, Raffaele [1 ]
Lanuzza, Marco [1 ]
Magnone, Paolo [2 ]
Conti, Silvia [3 ]
Iannaccone, Giuseppe [4 ]
Crupi, Felice [1 ]
机构
[1] Univ Calabria, DIMES, I-87036 Arcavacata Di Rende, Italy
[2] Univ Padua, Dept Management & Engn, I-36100 Vicenza, Italy
[3] Ist Italiano Tecnol, I-16163 Genoa, Italy
[4] Univ Pisa, Dipartimento Ingn Informaz, I-56122 Pisa, Italy
关键词
2D materials; Paper electronics; Verilog-A model; Hardware security; Physically Unclonable Function (PUF);
D O I
10.1016/j.sse.2022.108391
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Two-dimensional (2D) materials are recognized as a promising beyond-CMOS technology thanks to their attractive electrical and mechanical properties, which make them particularly suitable for flexible electronics. This work investigates molybdenum disulfide (MoS2) based field-effect transistors (FETs) fabricated on paper substrate to design hardware-security primitives such as Physically Unclonable Functions (PUFs). Circuit simulations have been performed by using a look-up-table (LUT) based Verilog-A model calibrated on electrical measurements of fabricated devices. Obtained results prove the potential of paper-based MoS2 FETs as building blocks for next-generation flexible electronics in the field of hardware security.
引用
收藏
页数:8
相关论文
共 29 条
[1]   Two-dimensional flexible nanoelectronics [J].
Akinwande, Deji ;
Petrone, Nicholas ;
Hone, James .
NATURE COMMUNICATIONS, 2014, 5
[2]   Trendsin hardware security from basics to ASICs [J].
Alioto M. .
IEEE Solid-State Circuits Magazine, 2019, 11 (03) :56-74
[3]   Static Physically Unclonable Functions for Secure Chip Identification With 1.9-5.8% Native Bit Instability at 0.6-1 V and 15 fJ/bit in 65 nm [J].
Alvarez, Anastacia B. ;
Zhao, Wenfeng ;
Alioto, Massimo .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2016, 51 (03) :763-775
[4]  
Chhowalla M, 2016, NAT REV MATER, V1, DOI [10.1038/natrevmats2016.52, 10.1038/natrevmats.2016.52]
[5]   A physical unclonable function based on a 2-transistor subthreshold voltage divider [J].
De Rose, Raffaele ;
Crupi, Felice ;
Lanuzza, Marco ;
Albano, Domenico .
INTERNATIONAL JOURNAL OF CIRCUIT THEORY AND APPLICATIONS, 2017, 45 (02) :260-273
[6]   Spin-orbit torque based physical unclonable function [J].
Finocchio, G. ;
Moriyama, T. ;
De Rose, R. ;
Siracusano, G. ;
Lanuzza, M. ;
Puliafito, V ;
Chiappini, S. ;
Crupi, F. ;
Zeng, Z. ;
Ono, T. ;
Carpentieri, M. .
JOURNAL OF APPLIED PHYSICS, 2020, 128 (03)
[7]   Nanomaterials in transistors: From high-performance to thin-film applications [J].
Franklin, Aaron D. .
SCIENCE, 2015, 349 (6249)
[8]  
Halak B, 2018, Physically Unclonable Functions: From Basic Design Principles to Advanced Hardware Security Applications, DOI DOI 10.1007/978-3-319-76804-5
[9]   Flexible Electronics: Stretchable Electrodes and Their Future [J].
Huang, Siya ;
Liu, Yuan ;
Zhao, Yue ;
Ren, Zhifeng ;
Guo, Chuan Fei .
ADVANCED FUNCTIONAL MATERIALS, 2019, 29 (06)
[10]   Insights on the physics and application of off-plane quantum transport through graphene and 2D materials [J].
Iannaccone, G. ;
Zhang, Q. ;
Bruzzone, S. ;
Fiori, G. .
SOLID-STATE ELECTRONICS, 2016, 115 :213-218