A 40-GHz Phase-Locked Loop Front-End for 60-GHz Transceivers in 65nm CMOS

被引：0

作者：

Cheema, Hammad M. ^{[1
,2
]}

Mahmoudi, Reza ^{[1
]}

van Roermund, Arthur ^{[1
]}

机构：

[1] Eindhoven Univ Technol, Dept Elect Engn, Mixed sign Microelect Grp, NL-5600 MB Eindhoven, Netherlands

[2] Natl Univ Sci & Technol, SEECS, RIMM, Islamabad, Pakistan

来源：

PROCEEDINGS OF THE 2010 IEEE ASIA PACIFIC CONFERENCE ON CIRCUIT AND SYSTEM (APCCAS) | 2010年

关键词：

injection locked frequency divider; voltage controlled oscillator; phase locked loop;

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A phase-locked loop front-end including a LC voltage controlled oscillator and an I-Q injection locked frequency divider is presented. The operation ranges of the VCO and ILFD are aligned by co-designing the tank, specifically the tunable varactors. The total locking range of the front-end is 37.6 to 42.2 GHz which corresponds to a down-conversion range from 56.4 to 63.3 GHz at 60 GHz, thus covering the complete ISM band. The front-end phase noise for a VCO frequency of 39.8 GHz is -102 dBc/Hz at 1 MHz offset. The DC power consumption of the VCO and Q-ILFD is 6mW and 9mW from a 1.2 V supply, respectively. Implemented in a bulk CMOS 65nm technology, the circuit occupies an area of 0.7x0.5 mm(2).

引用

页码：963 / 966

页数：4

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