Reconfigurable hardware implementation of the improved triple DES based on genetic algorithm

被引：0
|
作者：
Wang, Li [1 ]
Wang, Youren [1 ]
Yao, Rui [1 ]
机构：
[1] Nanjing Univ Aeronaut & Astronaut, Coll Automat & Engn, Nanjing 210015, Peoples R China
来源：
DYNAMICS OF CONTINUOUS DISCRETE AND IMPULSIVE SYSTEMS-SERIES B-APPLICATIONS & ALGORITHMS | 2007年 / 14卷
关键词：
triple DES; reconfigurable hardware; genetic algorithm; key; FPGA;
D O I：
暂无
中图分类号：
O29 [应用数学];
学科分类号：
070104 ;
摘要：
Triple DES is widely used in various cryptographic applications and wireless protocol security layers. This paper analyzes the DES and triple DES algorithms, proposes a design approach of reconfigurable triple DES system based on reconfigurable hardware; and develops a method of key generation with the genetic algorithm which uses 64 bits key to realize triple DES algorithm. The reconfigurable triple DES system has been implemented on Virtex-E FPGA. The result proves that the reconfigurable triple DES easily realizes, holds less hardware resource, has higher security level. Weak keys and semiweak keys can also be used in this reconfigurable triple DES system.
引用
收藏
页码：569 / 573
页数：5
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