共 50 条
- [23] A Multilevel Multilayer Partitioning Algorithm for Three Dimensional Integrated Circuits PROCEEDINGS OF THE ELEVENTH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED 2010), 2010, : 483 - 487
- [25] Monolithic Three-Dimensional Integrated Circuits: Process and Design Implications INTERNATIONAL SYMPOSIUM ON FUNCTIONAL DIVERSIFICATION OF SEMICONDUCTOR ELECTRONICS 2 (MORE-THAN-MOORE 2), 2014, 61 (06): : 3 - 10
- [26] "Green" On-chip Inductors in Three-Dimensional Integrated Circuits 2014 IEEE COMPUTER SOCIETY ANNUAL SYMPOSIUM ON VLSI (ISVLSI), 2014, : 572 - 577
- [27] Integration schemes and enabling technologies for three-dimensional integrated circuits IET COMPUTERS AND DIGITAL TECHNIQUES, 2011, 5 (03): : 160 - 168
- [28] Architectural Benefits and Design Challenges for Three-dimensional Integrated Circuits PROCEEDINGS OF THE 2010 IEEE ASIA PACIFIC CONFERENCE ON CIRCUIT AND SYSTEM (APCCAS), 2010, : 540 - 543
- [29] Routing Complexity Minimization of Monolithic Three-Dimensional Integrated Circuits PROCEEDINGS OF THE 2019 20TH INTERNATIONAL SYMPOSIUM ON QUALITY ELECTRONIC DESIGN (ISQED), 2019, : 329 - 334
- [30] Fast, automated thermal simulation of three-dimensional integrated circuits ITHERM 2004, VOL 1, 2004, : 706 - 713