CMOS analog integrated circuits;
sigma-delta modulation;
smart sensors;
temperature sensors;
COMPENSATION;
D O I:
10.1109/JSSC.2010.2076610
中图分类号:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号:
0808 ;
0809 ;
摘要:
An NPN-based temperature sensor with digital output has been realized in a 65-nm CMOS process. It achieves a batch-calibrated inaccuracy of +/-0.5 degrees C (3 sigma) and a trimmed inaccuracy of +/-0.2 degrees C (3 sigma) over the temperature range from -70 degrees C to 125 degrees C. This performance is obtained by the use of NPN transistors as sensing elements, the use of dynamic techniques, i.e., correlated double sampling and dynamic element matching, and a single room-temperature trim. The sensor draws 8.3 mu A from a 1.2-V supply and occupies an area of 0.1 mm(2).