GPU-Accelerated Parallel Monte Carlo Analysis of Analog Circuits by Hierarchical Graph-based Solver

被引:0
|
作者
Zhu, Yan [1 ]
Tan, Sheldon X. -D. [1 ]
机构
[1] Univ Calif Riverside, Dept Elect Engn, Riverside, CA 92521 USA
关键词
SYMBOLIC ANALYSIS; SIMULATION;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this article, we propose a new parallel matrix solver, which is very amenable for Graphic Process Unit (GPU) based fine-grain massively-threaded parallel computing. The new method is based on the graph-based symbolic analysis technique to generate the computing sequence of determinants in terms of determinant decision diagrams (DDDs). DDD represents very simple data dependence and data parallelism, which can be explored much easier by GPU massively-threaded parallel computing than existing LU-based methods. The new method is based on the hierarchical determinant decision diagrams (HDDDs). Inspired by the inherent data parallelism and simple data dependence in the evaluation process of HDDD, we design GPU-amenable continuous data structures to enable fast memory access and evaluation of massive parallel threads. In addition to parallelism in DDD graph, the new algorithm can naturally explore data independence existing in Monte Carlo and frequency domain analysis. The resulting algorithm is a general-purpose matrix solver suitable for fine-grain massive GPU-based computing for any circuit matrices. Experimental results show that the new evaluation algorithm can achieve about two orders of magnitude speedup over the serial CPU based evaluation and more than 4x speedup over numerical SPICE-based simulation method on some large analog circuits.
引用
收藏
页码:719 / 724
页数:6
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