Low-Temperature III-V Direct Wafer Bonding Surface Preparation Using a UV-Sulfur Process

被引:14
|
作者
Jackson, Michael J. [1 ]
Chen, Li-Min [1 ]
Kumar, Ankit [1 ]
Yang, Yang [1 ]
Goorsky, Mark S. [1 ]
机构
[1] Univ Calif Los Angeles, Dept Mat Sci & Engn, Los Angeles, CA 90095 USA
关键词
Wafer bonding; materials integration; III-V; sulfur passivation; COMPOUND SEMICONDUCTORS; GAAS; EXFOLIATION; ADHESION;
D O I
10.1007/s11664-010-1397-8
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A technique for direct wafer bonding of III-V materials utilizing a dry sulfur passivation method is presented. Large-area bonding occurs for GaAs/GaAs and InP/InP at room temperature. Bulk fracture strength is achieved after annealing GaAs/GaAs at 400 degrees C and InP/InP at 300 degrees C for times less than 12 h without large compressive forces. X-ray photoelectron spectroscopy measurements of the treated, bonded, and subsequently delaminated surfaces of GaAs/GaAs confirm that sulfide is present at the interface and that the oxide components show a reduced concentration when compared with samples treated with only an oxide etch solution.
引用
收藏
页码:1 / 5
页数:5
相关论文
共 30 条
  • [1] Low-Temperature III–V Direct Wafer Bonding Surface Preparation Using a UV-Sulfur Process
    Michael J. Jackson
    Li-Min Chen
    Ankit Kumar
    Yang Yang
    Mark S. Goorsky
    Journal of Electronic Materials, 2011, 40 : 1 - 5
  • [2] Investigation of Sulfur Passivation Treatments for Direct Wafer Bonding of III-V Materials
    Jackson, Michael J.
    Jackson, Biyun L.
    Goorsky, Mark S.
    SEMICONDUCTOR WAFER BONDING 11: SCIENCE, TECHNOLOGY, AND APPLICATIONS - IN HONOR OF ULRICH GOSELE, 2010, 33 (04): : 375 - 382
  • [3] Low-Temperature Direct Wafer Bonding for III-V Compound Semiconductors to Nanometer-scale Grating Arrays
    Chen, Bai-Ci
    Wu, Yu-Chang
    Huang, Jen-Hung
    Kuo, Hao-Chung
    Lin, Chien-Chung
    2015 INTERNATIONAL SYMPOSIUM ON NEXT-GENERATION ELECTRONICS (ISNE), 2015,
  • [4] LOW-TEMPERATURE PD BONDING OF III-V SEMICONDUCTORS
    TAN, IH
    REAVES, C
    HOLMES, AL
    HU, EL
    BOWERS, JE
    DENBAARS, S
    ELECTRONICS LETTERS, 1995, 31 (07) : 588 - 589
  • [5] LOW-TEMPERATURE PYREX GLASS WAFER DIRECT BONDING
    PIGEON, F
    BIASSE, B
    ZUSSY, M
    ELECTRONICS LETTERS, 1995, 31 (10) : 792 - 793
  • [6] Low-temperature, strong SiO2-SiO2 covalent wafer bonding for III-V compound semiconductors-to-silicon photonic integrated circuits
    Liang, Di
    Fang, Alexander W.
    Park, Hyundai
    Reynolds, Tom E.
    Warner, Keith
    Oakley, Douglas C.
    Bowers, John E.
    JOURNAL OF ELECTRONIC MATERIALS, 2008, 37 (10) : 1552 - 1559
  • [7] Low-temperature direct growth for low dislocation density in III-V on Si towards high-efficiency III-V/Si tandem solar cells
    Yamaguchi, Masafumi
    Wang, Yu-Cian
    Kojima, Nobuaki
    Yamamoto, Akio
    Ohshita, Yoshio
    JAPANESE JOURNAL OF APPLIED PHYSICS, 2021, 60 (SB)
  • [8] Heterogeneous Integration of III-V Materials by Direct Wafer Bonding for High-Performance Electronics and Optoelectronics
    Caimi, Daniele
    Tiwari, Preksha
    Sousa, Marilyne
    Moselund, Kirsten E.
    Zota, Cezar B.
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2021, 68 (07) : 3149 - 3156
  • [9] Low-Temperature Material Stacking of Ultrathin Body Ge (110)-on-Insulator Structure via Wafer Bonding and Epitaxial Liftoff From III-V Templates
    Shim, Jae-Phil
    Kim, Han-Sung
    Ju, Gunwu
    Lim, Hyeong-Rak
    Kim, Seong Kwang
    Han, Jae-Hoon
    Kim, Hyung-Jun
    Kim, Sang-Hyeon
    IEEE TRANSACTIONS ON ELECTRON DEVICES, 2018, 65 (03) : 1253 - 1257
  • [10] Low-temperature quartz wafer bonding using hyperbranched polyurethane oligomers
    Jian Zhao
    Fei Jin
    Jianying Zhao
    Shaomin Liu
    Microsystem Technologies, 2015, 21 : 1473 - 1478