Multiplierless implementations of adaptive FIR filters

被引:0
|
作者
DeBrunner, LS [1 ]
Wang, YH [1 ]
DeBrunner, V [1 ]
Tull, M [1 ]
机构
[1] Univ Oklahoma, Sch Elect & Comp Engn, Norman, OK 73019 USA
关键词
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Implementations of adaptive filters using field programmable gate arrays require the ability to change the coefficient values of the filter based on the adaptation algorithm. Multiplierless filter designs rely on a prion knowledge of the coefficient values to implement the filter using hard-wired shifts and additions. We describe a multiplierless approach to adaptive filter implementation that reduces the complexity from quadratic to linear in the number of bits.
引用
收藏
页码:2232 / 2236
页数:5
相关论文
共 50 条
  • [31] Design of High-Speed Multiplierless Linear-Phase FIR Filters
    Ye, Wen Bin
    Lou, Xin
    Yu, Ya Jun
    2015 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2015, : 2964 - 2967
  • [32] FPGA implementation of high speed multiplierless frequency response masking FIR filters
    Lian, Y
    2000 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS: DESIGN AND IMPLEMENTATION, 2000, : 317 - 325
  • [33] CSDC: A new complexity reduction technique for multiplierless implementation of digital FIR filters
    Wang, Y
    Roy, K
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, 2005, 52 (09) : 1845 - 1853
  • [34] Design of Low-Power Multiplierless Linear-Phase FIR Filters
    Ye, Wen Bin
    Lou, Xin
    Yu, Ya Jun
    IEEE ACCESS, 2017, 5 : 23466 - 23472
  • [35] A Design Technique for Two-Dimensional Multiplierless FIR Filters for Video Applications
    Banzato, Luca
    Benvenuto, Nevio
    Cortelazzo, Guido Maria
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, 1992, 2 (03) : 273 - +
  • [36] Multiplierless and hierarchical structures for maximally flat half-band FIR filters
    Samadi, S
    Iwakura, K
    Nishihara, A
    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II-ANALOG AND DIGITAL SIGNAL PROCESSING, 1999, 46 (09): : 1225 - 1230
  • [37] Design and Optimization of Multiplierless FIR Filters Using Sub-Threshold Circuits
    Hu, Yingbo
    Parhi, Keshab K.
    JOURNAL OF SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2013, 70 (03): : 259 - 274
  • [38] Design of multiplierless programmable linear phase narrowband-bandpass FIR filters
    Sivaramakrishnan, K
    Linscott, IR
    Tyler, GL
    2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 3, PROCEEDINGS, 2004, : 493 - 496
  • [39] Multiplierless arrays for realization of lowpass and highpass linear phase FIR digital filters
    Samadi, S
    Nishihara, A
    Fujii, N
    IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, 1996, E79A (08) : 1112 - 1119
  • [40] A modified micro-genetic algorithm for the design of multiplierless digital FIR filters
    Cen, L
    Lian, Y
    TENCON 2004 - 2004 IEEE REGION 10 CONFERENCE, VOLS A-D, PROCEEDINGS: ANALOG AND DIGITAL TECHNIQUES IN ELECTRICAL ENGINEERING, 2004, : A52 - A55