Discrete Multiplierless Implementation of Fractional Order Hindmarsh-Rose Model

被引:11
|
作者
Malik, S. A. [1 ,2 ]
Mir, A. H. [2 ]
机构
[1] Islamic Univ Sci & Technol, Elect & Commun Engn Dept, Awantpiora 192122, India
[2] Natl Inst Technol, Electon & Commun Engn Dept, Machine Learing Lab, Srinagar 190006, Jammu & Kashmir, India
来源
IEEE TRANSACTIONS ON EMERGING TOPICS IN COMPUTATIONAL INTELLIGENCE | 2021年 / 5卷 / 05期
关键词
Neurons; Biological system modeling; Computational modeling; Mathematical model; Brain modeling; Hardware; Neuroscience; Hindmarsh Rose (HR) neuron; fractional order; coupling; synchronization; field programmable gate arrays (FPGAs); SPIKING NEURONS; REALIZATION; SYNCHRONIZATION; STABILITY;
D O I
10.1109/TETCI.2020.2979462
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Efficient mathematical modeling and implementation of neuronal architectures are key to the fundamental understanding of the biological brain as an information processing system. Some areas of the biological brain are best described by their fractional order modelling than their integer order modelling counter parts. Fractional order derivative has also higher memory characteristics comapred to the integer order, therefore is an excellent tool for modelling biological neurons. High accuacry implementation of these neural networks (NN) of the biological brain demands high computational overhead. This article presents a piecewise linear modificattion of fractional order Hindmarsh-Rose (HR) neuron, which produces several dynamical behaviours similar to real neuron. We have proposed a modified version of the said design which is more resource friendly in terms hardware implementation cost. A coupled system of two fractional order Hindmarsh-Rose (HR) neurons is also presented. These neuronal units are synchronized using an exponential synaptic coupling function. A simplification of synchronization function is also presented to decrease the hardware cost. Both simulation and hardware implementation results show that the neuronal model mimics the desired bahviour with acceptable error. The proposed linear model mimics neuron behavior when its realization was carried out on a field-programmable gate array (FPGA). A significant improvement in performance with considerably lower hardware cost was achieved compared to the original neuron model.
引用
收藏
页码:792 / 802
页数:11
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