VERITAS 2.2 a low noise, source follower and drain current readout integrated circuit for the wide field imager on the Athena X-ray satellite

VERITAS 2.2 is an evolutionary step of the VERITAS readout integrated circuit (ROIC) architecture designed for high speed, low noise DEPFET source follower or drain readout for the Wide Field Imager on the Athena X-ray satellite. Drain readout, also known as current readout, mitigates the RC time of the classical source follower readout. This is particularly beneficial for large DEPFET detectors where the line capacitance is large, with the current measured at the drain of the DEPFET transistor providing an immediate signal proportional to the collected charge in the pixel. VERITAS 2.2 is designed to address the implementation challenges of drain readout and deliver consistent performance at short processing time (2.5 mu s) with a system noise better than 3 e(-).