Design reuse of on/off-chip bus bridge for efficient test access to AMBA-based SoC

被引：0

作者：

Song, Jaehoon ^{[1
]}

Han, Juhee ^{[1
]}

Kim, Dooyoung ^{[1
]}

Yi, Hyunbean ^{[1
]}

Park, Sungju ^{[1
]}

机构：

[1] Hanyang Univ, Dept Comp Sci & Engn, Ansan, South Korea

来源：

PROCEEDINGS OF THE 16TH ASIAN TEST SYMPOSIUM | 2007年

关键词：

D O I：

10.1109/ATS.2007.13

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper introduces an efficient test access mechanism for Advanced Microcontroller Bus Architecture (AMBA) based SoC to reduce the test application time while minimally adding a new test interface logic. Testable design technique is applied to an SoC with the Advanced High-performance Bus (AHB) and PCI bus bridge by maximally reusing the bridge functions. Testing time can be significantly reduced by increasing the test channels and by shortening the test control protocols. Experimental results show that area overhead and testing times in both functional and structural test modes are considerably reduced.

引用

页码：193 / 198

页数：6