FPGA-Based In-Circuit Verification of Digital Systems

In general hardware designers design integrated circuit with hardware description languages or schematic diagram. However the growth of circuit complexity makes circuit design error prone and time consuming. The resulting descriptions tend to be lengthy and hard to reason about. Therefore functional simulation, timing simulation and in-circuit test are three essential steps to ensure that the designed circuit is correct. This paper presents a method of in-circuit verification on FPGA using UART communication between the computer and the FPGA board. Through UART, designers can convert the parallel input vector into a set of serial stimulus signals and send them to the FPGA board, and also can receive the feedback serial signals from the FPGA board and reconvert them into a parallel output vector. Given the input and output ports of the verified circuit component, a verification platform based on UART communication will be customized automatically by the in-circuit verification platform generator. This breaks the constraint of the FPGA board's limited pins and supports wide-scale input/output vectors and can be applied in in-circuit test of digital circuit.