Self-Adaptive Power Gating with Test Circuit for On-line Characterization of Energy Inflection Activity

被引：0

作者：

Trivedi, Amit Ranjan ^{[1
]}

Mukhopadhyay, Saibal ^{[1
]}

机构：

[1] Georgia Inst Technol, Dept ECE, Atlanta, GA 30322 USA

来源：

2012 IEEE 30TH VLSI TEST SYMPOSIUM (VTS) | 2012年

关键词：

Power-gating; SRAM; On-line characterization; Self-adaptation; Energy-efficiency;

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A test circuit is presented for post-silicon and on-line characterization of the energy-inflection activity of power-gated circuits (the activity when overhead energy is equal to leakage savings) under static (process) and dynamic (voltage/temperature/input) variations. The test circuit is applied to design self-adaptive power-gating for energy-efficient SRAM.

引用

页码：38 / 43

页数：6

共 12 条

[1]

Dropsho S., 2002, IEEE MICR 2002

[2]

Hu Z., 2004, ISLPED

[3]

Jiang H., 2005, ICCD 2005

[4]

Kim C., 2005, IEEE TVLSI 2005

[5]

Liao W., 2002, IEEE ACM ICCAD 2002

[6]

Mukhopadhyay S., 2005, ITC 2005

[7]

Ravi S., 2007, IEEE INT TEST C

[8] Leakage current mechanisms and leakage reduction techniques in deep-submicrometer CMOS circuits [J].

Roy, K ;

Mukhopadhyay, S ;

Mahmoodi-Meimand, H .

PROCEEDINGS OF THE IEEE, 2003, 91 (02) :305-327

[9]

Rusu S., 2006, ISSCC

[10]

Tschanz J., 2003, ISSCC

← 1 2 →