A Modified Voltage Balancing Algorithm for the Modular Multilevel Converter: Evaluation for Staircase and Phase-Disposition PWM

被引:105
作者
Darus, Rosheila [1 ,2 ]
Pou, Josep [1 ,2 ]
Konstantinou, Georgios [1 ,2 ]
Ceballos, Salvador [3 ]
Picas, Ricard [4 ]
Agelidis, Vassilios G. [1 ,2 ]
机构
[1] Univ New S Wales, Australian Energy Res Inst, Sydney, NSW 2052, Australia
[2] Univ New S Wales, Sch Elect Engn & Telecommun, Sydney, NSW 2052, Australia
[3] Tecnalia Res & Innovat, Energy Unit, Derio 48160, Spain
[4] Tech Univ Catalonia, Terrassa Ind Elect Grp, Terrassa 08222, Spain
关键词
Capacitor voltage balancing; modular multilevel converter (MMC); modulation technique; pulse width modulation;
D O I
10.1109/TPEL.2014.2359005
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper introduces a low complexity implementation of the voltage balancing algorithm aiming to reduce the switching frequency of the power devices in modular multilevel converters (MMCs). The proposed algorithm features a relatively simple implementation without any conditional execution requirements and is easily expandable regardless of the number of submodules (SMs). Two modulation techniques are evaluated, namely the staircase modulation and the phase-disposition pulse width modulation (PD-PWM) under the conventional and the proposed algorithm. Using a circulating current controller in an MMC with 12 SMs per arm, PD-PWM yields better results compared to the staircase modulation technique. The test condition for this comparison is such that the power devices operate at a similar switching frequency and produce similar amplitudes to the capacitor voltage ripples in both modulation techniques. The results are verified through extensive simulations and experiments on a low power phase-leg MMC laboratory prototype.
引用
收藏
页码:4119 / 4127
页数:9
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