Design of IP core of DPSK modulator with variable bit rate and carrier frequency based on FPGA

被引：0
|
作者：
Zheng, Xin [1 ]
机构：
[1] Guang Xi Normal Univ Nationalities, Dept Phys & Elect Engn, Nanning, Peoples R China
来源：
COMPUTING, CONTROL, INFORMATION AND EDUCATION ENGINEERING | 2015年
关键词：
DPSK; Digital modulator; IP core; FPGA;
D O I：
暂无
中图分类号：
TP [自动化技术、计算机技术];
学科分类号：
0812 ;
摘要：
DPSK is widely applied in communication because of high-bandwidth utilization and strong capacity of anti-jamming. In connection with the defects of the DPSK digital modulator, The IP core of DPSK modulator with variable bit rate and carrier frequency based on FPGA and DSS is designed, whose bit rate and carrier frequency are programmed and adjusted by controller. The Signal Tap II Logic Analyzer is used to test and verify design.
引用
收藏
页码：73 / 76
页数：4
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