Applications of DCIV method to NBTI characterization

被引:32
作者
Neugroschel, A. [1 ]
Bersuker, G.
Choi, R.
机构
[1] Univ Florida, Dept Elect & Comp Engn, Gainesville, FL 32611 USA
[2] SEMATECH Inc, Austin, TX 78741 USA
关键词
D O I
10.1016/j.microrel.2007.07.037
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The DCIV method was applied to investigate negative bias temperature instability (NBTI) in SiO2 gate oxides. The DCIV technique, which measures the interface defect density independently from bulk oxide charges, delineates the contribution of the interface defect generation to the overall NBTI measured by the threshold voltage shift, Delta V-TH. The DCIV results obtained during both stress and relaxation phases are generally consistent with the main features of the reaction-diffusion (R-D) model, which suggests positive charge generation/annealing at the Si/SiO2 interface due to breaking/re-passivation of the Si-H bonds. These results are in agreement with the spin-dependent recombination (SDR) experiments, which reflect the density of the Si dangling bonds at the Si/SiO2 interface (P-b centers) and its vicinity (E' centers). Comparison of degradation kinetics as measured by DCIV, charge-pumping, and I-D - V-G (Delta V-TH) techniques, however, suggests that Delta V-TH includes additional contributions, most likely from the oxide bulk charges. For comparison, an NBTI study was also performed on the high-k HfO2/SiO2 gate stacks. After adjusting for the high-k related contribution, similar kinetics of the long-term stress interface trap generation was observed in SiO2 and high-k gate stacks suggesting a common mechanism of the interface degradation. (C) 2007 Elsevier Ltd. All rights reserved.
引用
收藏
页码:1366 / 1372
页数:7
相关论文
共 27 条
[1]  
ALAM MA, 2006, MICROELECTRON RELIAB, DOI DOI 10.1016/J.MICROEL.2006.10.012
[2]  
ANG DS, 2006, IEEE ELECT DEV, P914
[3]  
BAUZA D, 2002, IEEE ELECTR DEVICE L, P658
[4]   Interfacial electronic traps in surface controlled transistors [J].
Cai, J ;
Sah, CT .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2000, 47 (03) :576-583
[5]   Observations of NBTI-induced atomic-scale defects [J].
Campbell, Jason P. ;
Lenahan, Patrick M. ;
Krishnan, Anand T. ;
Krishnan, Srikanth .
IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, 2006, 6 (02) :117-122
[6]   A comprehensive framework for predictive modeling of negative bias temperature instability [J].
Chakravarthi, S ;
Krishnan, AT ;
Reddy, V ;
Machala, CF ;
Krishnan, S .
2004 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS, 2004, :273-282
[7]  
COCHRANE CJ, 2006, P INT INT REL WORKSH
[8]   On-the-fly characterization of NBTI in ultra-thin gate oxide PMOSFET's [J].
Denais, M ;
Bravaix, A ;
Huard, V ;
Parthasarathy, C ;
Ribes, G ;
Perrier, F ;
Rey-Tauriac, Y ;
Revil, N .
IEEE INTERNATIONAL ELECTRON DEVICES MEETING 2004, TECHNICAL DIGEST, 2004, :109-112
[9]  
GRASSER T, 2007, P IRPS
[10]   A RELIABLE APPROACH TO CHARGE-PUMPING MEASUREMENTS IN MOS-TRANSISTORS [J].
GROESENEKEN, G ;
MAES, HE ;
BELTRAN, N ;
DEKEERSMAECKER, RF .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1984, 31 (01) :42-53