Low-Cost Duplicate Multiplication

被引:7
|
作者
Sullivan, Michael B. [1 ]
Swartzlander, Earl E., Jr. [1 ]
机构
[1] Univ Texas Austin, Austin, TX 78712 USA
来源
IEEE 22ND SYMPOSIUM ON COMPUTER ARITHMETIC ARITH 22 | 2015年
关键词
Low-Cost Duplication; Dual Modular Redundancy; Low-Cost Error Detection; Concurrent Error Detection; Self-testing and Self-checking Circuitry; Computer Arithmetic; BIAS TEMPERATURE INSTABILITY; ERROR-DETECTION; RELIABILITY; RAS; SERVICEABILITY; AVAILABILITY; CHECKING; SYSTEMS; DESIGN;
D O I
10.1109/ARITH.2015.29
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Rising levels of integration, decreasing component re liabilities, and the ubiquity of computer systems make error protection a rising concern. Meanwhile, the uncertainty of future fault and error modes motivates the design of strong error detection mechanisms that offer fault-agnostic error protection. Current concurrent hardware mechanisms, however, either offer strong error detection coverage at high cost or restrict their coverage to narrow synthetic error models. This paper investigates the potential for duplication using alternate number systems to lower the costs of duplicated multiplication without sacrificing error coverage. Two examples of such low-cost duplication schemes are described and evaluated; it is shown that specialized carry-save or residue number system checking can be used to increase the efficiency of duplicated multiplication.
引用
收藏
页码:2 / 9
页数:8
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