A 12.1bit-ENOB noise shaping SAR ADC for biosensor applications

This paper proposes a low power fully-passive noise shaping successive approximation register analog-to-digital converter (SAR ADC) for biosensor applications. The proposed ADC includes a second-order fully-passive integrator achieves a second-order noise transfer function. With an independent residue voltage generator to adjust common voltage between the main and residue path, the power efficiency of three differential inputs comparator is improved. The 0.18 mu m CMOS prototype chip occupies a total area of 1.37 mm(2) with a core area of 0.58 mm(2) and consumes 131 mu W from a 1.3 V supply. The proposed SAR ADC achieves a peak signal-to-noise-and-distortion ratio (SNDR) of 74.8 dB and a peak spurious-free dynamic range (SFDR) of 89.7 dB at a sampling rate of 8 MSPS and oversampling rate of 16, leading to the Schreier figure of merit (FoMs) of the proposed ADC of 167.4 dB.