Effects of Channel Width and Nitride Passivation Layer on Electrical Characteristics of Polysilicon Thin-Film Transistors

被引:8
作者
Liao, Chia-Chun [1 ]
Lin, Min-Chen [1 ]
Chiang, Tsung-Yu [1 ]
Chao, Tien-Sheng [1 ]
机构
[1] Natl Chiao Tung Univ, Dept Electrophys, Hsinchu 300, Taiwan
关键词
Gate-induced drain leakage (GIDL); grain boundary; intragrain; kink effect; radical; NH3 PLASMA PASSIVATION; POLY-SI TFTS; SILICON-NITRIDE; FLUORINE PASSIVATION; HYDROGEN PASSIVATION; RELIABILITY; PERFORMANCE; DEPOSITION; DEFECTS; KINK;
D O I
10.1109/TED.2011.2165214
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
SiN passivation layers were found to yield better performance, suppress the kink effect, and improve the gate leakage current and gate-induced drain leakage (GIDL) of polysilicon thin-film transistors (TFTs). The SiN passivation layers deposited under different deposition conditions possess different characteristics due to their varying passivation effect. A physical mechanism is proposed to explain the double-hump phenomenon induced by incomplete trap passivation. Based on the analysis of width dependence, the better performance of the samples with SiN passivation layers was attributed not only to radical passivation of the defect states but also to radical passivation of preexisting defects in the gate oxide. Furthermore, using SiN passivation layers improves immunity to positive gate bias stress, negative gate bias stress, and hot-carrier stressing. Moreover, the manufacturing processes are simple (without the long processing time plasma treatment requires) and compatible with TFT processes.
引用
收藏
页码:3812 / 3819
页数:8
相关论文
共 30 条
[1]   Performance and reliability of low-temperature polysilicon TFT with a novel stack gate dielectric and stack optimization using PECVD nitrous oxide plasma [J].
Chang, KM ;
Yang, WC ;
Tsai, CP .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2004, 51 (01) :63-67
[2]   Electrical characteristics of low temperature polysilicon TFT with a novel TEOS/oxynitride stack gate dielectric [J].
Chang, KM ;
Yang, WC ;
Tsai, CP .
IEEE ELECTRON DEVICE LETTERS, 2003, 24 (08) :512-514
[3]   Effects of NH3 plasma passivation on N-channel polycrystalline silicon thin-film transistors [J].
Cheng, HC ;
Wang, FS ;
Huang, CY .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1997, 44 (01) :64-68
[4]  
CHERN HN, 1994, IEEE T ELECTRON DEV, V41, P698, DOI 10.1109/16.285019
[5]   Hydrogen passivation on the grain boundary and intragranular defects in various polysilicon thin-film transistors [J].
Choi, KY ;
Yoo, JS ;
Han, MK ;
Kim, YS .
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1996, 35 (2B) :915-918
[6]   AVALANCHE-INDUCED EFFECTS IN POLYSILICON THIN-FILM TRANSISTORS [J].
HACK, M ;
LEWIS, AG .
IEEE ELECTRON DEVICE LETTERS, 1991, 12 (05) :203-205
[7]   HYDROGEN DIFFUSION IN POLYCRYSTALLINE SILICON THIN-FILMS [J].
JACKSON, WB ;
JOHNSON, NM ;
TSAI, CC ;
WU, IW ;
CHIANG, A ;
SMITH, D .
APPLIED PHYSICS LETTERS, 1992, 61 (14) :1670-1672
[8]   Surface treatment effect on the poly-Si TFTs fabricated by electric field enhanced crystallization of Ni/a-Si:H films [J].
Kim, B ;
Kim, HY ;
Seo, HS ;
Kim, SK ;
Kim, CD .
IEEE ELECTRON DEVICE LETTERS, 2003, 24 (12) :733-735
[9]   Poly-Si TFT fabricated by laser-induced in-situ fluorine passivation and laser doping [J].
Kim, CH ;
Jung, SH ;
Yoo, JS ;
Han, MK .
IEEE ELECTRON DEVICE LETTERS, 2001, 22 (08) :396-398
[10]   Kink-free polycrystalline silicon double-gate elevated-channel thin-film transistors [J].
Kumar, A ;
Sin, JKO ;
Nguyen, CT ;
Ko, PK .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1998, 45 (12) :2514-2520