Low Phase Noise and Low Power Consumption VCOs Using CMOS and IPD Technologies

被引:24
作者
Hsu, Yuan-Chia [1 ]
Chiou, Hwann-Kaeo [1 ]
Chen, Hsien-Ku [2 ]
Lin, Ta-Yeh [3 ]
Chang, Da-Chiang [3 ]
Juang, Ying-Zong [3 ]
机构
[1] Natl Cent Univ, Dept Elect Engn, Jhongli 320, Taiwan
[2] Natl Taiwan Univ, Dept Elect Engn, Taipei 106, Taiwan
[3] Natl Appl Res Labs, Natl Chip Implementat Ctr, Hsinchu 300, Taiwan
来源
IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY | 2011年 / 1卷 / 05期
关键词
Complementary metal-oxide semiconductor; flip-chip; integrated passive device; phase noise; voltage controlled oscillator; FABRICATION; DESIGN;
D O I
10.1109/TCPMT.2011.2109386
中图分类号
T [工业技术];
学科分类号
08 ;
摘要
This paper presents two voltage controlled oscillators (VCOs) operating at 5.42 and 5.76 GHz implemented in 0.18-mu m complementary metal-oxide semiconductor (CMOS) technology with integrated passive device (IPD) inductors. One IPD inductor was stacked on the top of the active region of the 5.76-GHz VCO chip, whereas the other IPD inductor was placed on the top of the 5.42-GHz VCO CMOS chip but far from the its active region. The high-quality IPD inductors reduce the phase noise of the VCOs. The measurements of the two VCOs indicate the same phase noise of -120 dBc/Hz at 1 MHz offset frequency. These results demonstrate a 6-dB improvement compared to the VCO using an on-chip inductor. This paper also presents the effect of the coupling between the IPD inductor and the active region of the chip on the phase noise performance.
引用
收藏
页码:673 / 680
页数:8
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