Test input generation for supply current testing of bridging faults in bipolar combinational logic circuits

被引：2

作者：

Kuchii, T ^{[1
]}

Hashizume, M ^{[1
]}

Tamesada, T ^{[1
]}

机构：

[1] Univ Tokushima, Fac Engn, Tokushima 7708506, Japan

来源：

1998 IEEE INTERNATIONAL WORKSHOP ON IDDQ TESTING, PROCEEDINGS | 1998年

关键词：

D O I：

10.1109/IDDQ.1998.730726

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

A test input generation algorithm for supply current tests is proposed to detect bridging faults in bipolar combinational circuits. By using the algorithm, test input vectors are derived for ISCAS-85 benchmark circuits, which are implemented on printed boards. It is shown by the test generation that more faults in bipolar circuits can be detected with a smaller number of test input vectors than a conventional test method based on output logic values.

引用

页码：14 / 18

页数：5

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