共 20 条
- [1] A Design Framework for Processing-In-Memory Accelerator 2018 ACM/IEEE INTERNATIONAL WORKSHOP ON SYSTEM LEVEL INTERCONNECT PREDICTION (SLIP), 2018,
- [2] PIMS: A Lightweight Processing-in-Memory Accelerator for Stencil Computations MEMSYS 2019: PROCEEDINGS OF THE INTERNATIONAL SYMPOSIUM ON MEMORY SYSTEMS, 2019, : 41 - 52
- [3] NeuroPIM: Felxible Neural Accelerator for Processing-in-Memory Architectures 2023 26TH INTERNATIONAL SYMPOSIUM ON DESIGN AND DIAGNOSTICS OF ELECTRONIC CIRCUITS AND SYSTEMS, DDECS, 2023, : 51 - 56
- [4] SpaceA: Sparse Matrix Vector Multiplication on Processing-in-Memory Accelerator 2021 27TH IEEE INTERNATIONAL SYMPOSIUM ON HIGH-PERFORMANCE COMPUTER ARCHITECTURE (HPCA 2021), 2021, : 570 - 583
- [5] Live Demonstration for Input-Sparsity-Aware RRAM Processing-in-Memory Chip 2024 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ISCAS 2024, 2024,
- [6] A High-Performance Processing-in-Memory Accelerator for Inline Data Deduplication 2019 IEEE 37TH INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD 2019), 2019, : 515 - 523
- [9] SISA: Set-Centric Instruction Set Architecture for Graph Mining on Processing-in-Memory Systems PROCEEDINGS OF 54TH ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE, MICRO 2021, 2021, : 282 - 297