Design of Multilayer On-chip Inductor with Low K-Dielectrics for RF applications

In this paper the effect of low k dielectrics on Quality factor is studied using multi level interconnect technology. With low-K dielectric we achieved improvement in the Quality factor of spiral inductor at higher frequency. From the simulation results the proposed inductor using low k dielectric achieved high Q with 100% improvement when compared with basic CMOS process on chip inductor. The percentage of increase in quality will improve as we increase the outer diameter of the spiral inductor. It is also observed the effect of conductor width and outer diameter on the proposed inductor following standard rules defined. The proposed inductor structure occupies maximum area of 20 mu mx20 mu m which is suitable for higher order RF frequency applications.