Novel SiC wafer manufacturing process employing three-step slurryless electrochemical mechanical polishing

In this work, a three-step silicon carbide (SiC) wafer manufacturing process using slurryless electrochemical mechanical polishing (ECMP) is proposed. In the first step, ECMP using fixed hard abrasives is applied to an as sliced SiC wafer to rapidly remove the subsurface damage (SSD) and waviness induced during slicing. Then, the SiC wafer is polished using the second-step ECMP by employing a ceria grinding stone to remove the residual SSD and decrease the surface roughness. Finally, a finishing ECMP step employing a low potential is used to further decrease the surface roughness. Before applying this proposed three-step process to an as-sliced SiC wafer, a suitable grinding stone was selected for the first-step ECMP by evaluating the uniformity of the induced SSD layer and the obtained surface roughness. By applying the first step, i.e., ECMP using fixed-diamond abrasives, the root-mean-square (Sq) surface roughness decreased from 163.33 to 25.45 nm within 20 min with a material removal rate (MRR) of 62 mu m/h. During the 30-min second step, the Sq and the maximum height (Sz) surface roughness values further decreased to 0.82 and 6.96 nm, respectively, with an MRR of 11 mu m/h. Finally, the 60 min finishing step allowed the Sq and Sz surface roughness values to further decrease to 0.11 and 1.46 nm, respectively; furthermore, a surface with a step-terrace structure was obtained, which is comparable to the surface obtained by conventional chemical mechanical polishing. Overall, the proposed three-step slurryless ECMP method allowed for the rapid transformation of an unprocessed SiC wafer to an atomically smooth surface and is thus expected to reduce the cost and manpower required during SiC wafer manufacturing.