Cryogenic MOSFET Threshold Voltage Model

被引：56

作者：

Beckers, Arnout ^{[1
]}

Jazaeri, Farzan ^{[1
]}

Enz, Christian ^{[1
]}

机构：

[1] Ecole Polytech Fed Lausanne, Integrated Circuits Lab ICLAB, Neuchatel, Switzerland

来源：

49TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC 2019) | 2019年

关键词：

CMOS TECHNOLOGY;

D O I：

10.1109/essderc.2019.8901806

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a physics-based model for the threshold voltage in bulk MOSFETs valid from room down to cryogenic temperature (4.2 K). The proposed model is derived from Poisson's equation including bandgap widening, intrinsic carrier-density scaling, and incomplete ionization. We demonstrate that accounting for incomplete ionization in the expression of the threshold voltage is critical for an accurate estimation of the current. The model is validated with our experimental results from nMOSFETs of a 28-nm CMOS process. The developed model is a key element for a cryo-CMOS compact model and can serve as a guide to optimize processes for high-performance cryo-computing and ultra-low-power quantum computing.

引用

页码：94 / 97

页数：4

共 12 条

[1]

Akturk A., 2007, IEEE T ED, V54

[2] Characterization and modeling of 28-nm FDSOI CMOS technology down to cryogenic temperatures [J].

Beckers, Arnout ;

Jazaeri, Farzan ;

Bohuslayskyi, Heorhii ;

Hutin, Louis ;

De Franceschi, Silvano ;

Enz, Christian .

SOLID-STATE ELECTRONICS, 2019, 159 :106-115

[3] Characterization and Modeling of 28-nm Bulk CMOS Technology Down to 4.2 K [J].

Beckers, Arnout ;

Jazaeri, Farzan ;

Enz, Christian .

IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 2018, 6 (01) :1007-1018

[4] Cryogenic MOS Transistor Model [J].

Beckers, Arnout ;

Jazaeri, Farzan ;

Enz, Christian .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2018, 65 (09) :3617-3625

[5] Cryogenic Characterization of 28 nm Bulk CMOS Technology for Quantum Computing [J].

Beckers, Arnout ;

Jazaeri, Farzan ;

Ruffino, Andrea ;

Bruschini, Claudio ;

Baschirotto, Andrea ;

Enz, Christian .

2017 47TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE (ESSDERC), 2017, :62-65

[6] All-Electrical Control of a Hybrid Electron Spin/Valley Quantum Bit in SOI CMOS Technology [J].

Bourdet, Leo ;

Hutin, Louis ;

Bertrand, Benoit ;

Corna, Andrea ;

Bohuslavskyi, Heorhii ;

Amisse, Anthony ;

Crippa, Alessandro ;

Maurand, Romain ;

Barraud, Sylvain ;

Urdampilleta, Matias ;

Baeuerle, Christopher ;

Meunier, Tristan ;

Sanquer, Marc ;

Jehl, Xavier ;

De Franceschi, Silvano ;

Niquet, Yann-Michel ;

Vinet, Maud .

IEEE TRANSACTIONS ON ELECTRON DEVICES, 2018, 65 (11) :5151-5156

[7]

Charbon E, 2016, INT EL DEVICES MEET

[8]

Dao N. C., 2017, MICROELECTRON RELIAB

[9] IMPURITY IONIZATION IN MOSFETS AT VERY LOW-TEMPERATURES [J].

FOTY, DP .

CRYOGENICS, 1990, 30 (12) :1056-1063

[10]

Fox R. M., 1987, IEEE T ED, V34

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