Uncertainty-based scheduling: Energy-efficient ordering for tasks with variable execution time

被引:0
作者
Gruian, F [1 ]
Kuchcinski, K [1 ]
机构
[1] Lund Univ, Dept Comp Sci, S-22100 Lund, Sweden
来源
ISLPED'03: PROCEEDINGS OF THE 2003 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN | 2003年
关键词
dynamic voltage scaling; low energy; real-time scheduling;
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Energy consumption reduction is today an important design issue for all kinds of digital systems. Offering both flexibility and efficient energy management, variable speed processor architectures are prefered for low energy consumption even in hard real-time systems. For this type of systems, the main approach consists in trading speed for lower energy while meeting all deadlines. For tasks with varying execution time, speed scheduling is most efficient if performed at run-time. This paper presents a new ordering technique for such tasks, that reduces the energy consumption resulting from the run-time speed scheduling. Without affecting the real-time behavior, our Uncertainty-Based Scheduling (UBS) is a low complexity but energy-efficient method that can be applied on top of already existent real-time scheduling techniques, such as EDF. These claims are backed up by extensive simulation results accompanied by measurements on a platform based oil an Intel i80200 XScale processor.
引用
收藏
页码:465 / 468
页数:4
相关论文
共 22 条
[11]  
LROCH JR, 2001, P ACM SIGMETRICS 01, P50
[12]   Static and dynamic variable voltage scheduling algorithms for real-time heterogeneous distributed embedded systems [J].
Luo, J ;
Jha, N .
ASP-DAC/VLSI DESIGN 2002: 7TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE AND 15TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2002, :719-726
[13]   Software energy reduction techniques for variable-voltage processors [J].
Okuma, T ;
Ishihara, T ;
Yasuura, H .
IEEE DESIGN & TEST OF COMPUTERS, 2001, 18 (02) :31-41
[14]  
Pedram M, 2001, PROCEEDINGS OF THE ASP-DAC 2001: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2001, P239, DOI 10.1109/ASPDAC.2001.913312
[15]   Voltage scheduling in the IpARM microprocessor system [J].
Pering, T ;
Burd, T ;
Brodersen, R .
ISLPED '00: PROCEEDINGS OF THE 2000 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN, 2000, :96-101
[16]  
PILLAI P, 2001, P 18 ACM S OP SYST P, P89, DOI DOI 10.1145/502034.502044
[17]   Energy priority scheduling for variable voltage processors [J].
Pouwelse, J ;
Langendoen, K ;
Sips, H .
ISLPED'01: PROCEEDINGS OF THE 2001 INTERNATIONAL SYMPOSIUM ON LOWPOWER ELECTRONICS AND DESIGN, 2001, :28-33
[18]  
Rabaey J.M., 1996, LOW POWER DESIGN MET
[19]  
SHIN D, 2001, IEEE DESIGN TEST COM, V18
[20]  
Shin Y, 2001, PROCEEDINGS OF THE IEEE 2001 CUSTOM INTEGRATED CIRCUITS CONFERENCE, P553, DOI 10.1109/CICC.2001.929841