Thermometer-to-binary decoders for flash analog-to-digital converters

被引：35

作者：

Sall, Erik ^{[1
]}

Vesterbacka, Mark ^{[1
]}

机构：

[1] Linkoping Univ, Dept Elect Engn, SE-58183 Linkoping, Sweden

来源：

2007 EUROPEAN CONFERENCE ON CIRCUIT THEORY AND DESIGN, VOLS 1-3 | 2007年

关键词：

D O I：

10.1109/ECCTD.2007.4529581

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Decoders for low power, high-speed flash ADCs are investigated. The sensitivity to bubble errors of the ROM decoder with error correction, ones-counter, 4-level folded Wallace-tree, and multiplexer-based decoder are simulated. The ones-counter and multiplexer-based decoder, corresponding to the error insensitive and hardware efficient cases, are implemented in a 130 nm CMOS SOI technology. Measurements yield an ENOB of about 4.1 bit for both, and energy consumption of 80 pJ and 60 pJ, for the respective decoders. Hence we conclude that the MUX-based decoder seems to be a good choice with respect to area, efficiency, and speed.

引用

页码：240 / 243

页数：4

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