High-performance SiC MOSFET embedded heterojunction diode with electric field protection region

In this study, we proposed high-performance SiC metal-oxide-semiconductor field effect transistors (MOSFETs) embedded heterojunction diode (HJD) with an electric field protection (EFP) region and analyzed it using a Sentaurus TCAD simulation. The proposed device features an HJD positioned at the trench side wall in the middle of the junction field effect transistor region and a highly doped EFP region under the P+ polysilicon to features excellent static performance and high reliability. The simulation results revealed that the maximum oxide electric field (E (MOX)) and the Baliga's figure-of-merit improved by 54% and 12%, respectively, compared with those of conventional SiC MOSFETs (C-MOSFETs). In addition, the EFP region suppressed the drain induced barrier lowering effect and leakage current in the HJD interface sufficiently. The HJD suppressed the bipolar degradation of the PiN body diode effectively due to its low V (F) (1.75 V). In addition, the proposed device demonstrated superior reverse-recovery characteristics, thereby improving t (rr) and Q (rr) by 35% and 57%, respectively, compared to the corresponding values in C-MOSFET. Moreover, the input capacitance (C (ISS)) was reduced by 17.5%, and C (GD) was reduced by 96%. Therefore, the high-frequency figure-of-merit improved by a factor of 25.8 in terms of R (ON) x C (GD). As a result, the proposed device is a promising structure for high-frequency and high-reliability applications.