Simulation of diffusion limited aggregation in field programmable gate arrays

被引：0

作者：

Wijesinghe, W. A. S. ^{[2
]}

Jayananda, M. K. ^{[1
]}

Sonnadara, D. U. J. ^{[1
]}

机构：

[1] Univ Colombo, Fac Sci, Dept Phys, Colombo 03, Sri Lanka

[2] Wayamba Univ Sri Lanka, Fac Sci Appl, Dept Elect, Makandura, Sri Lanka

来源：

JOURNAL OF THE NATIONAL SCIENCE FOUNDATION OF SRI LANKA | 2010年 / 38卷 / 04期

基金：

美国国家科学基金会;

关键词：

Dedicated hardware; FPGA; Monte Carlo simulation; VHDL; Xilinx; BREAKDOWN; COMPUTER; SYSTEMS; GROWTH;

D O I：

10.4038/jnsfsr.v38i4.2647

中图分类号：

O [数理科学和化学]; P [天文学、地球科学]; Q [生物科学]; N [自然科学总论];

学科分类号：

07 ; 0710 ; 09 ;

摘要：

This paper presents design considerations and performance in implementation of Diffusion-limited aggregation (DLA) process on a Xilinx Spartan 3 field programmable gate array (FPGA). The DLA cluster algorithm was implemented as a block RAM and two 32-bit Linear Feedback Shift Register random number generators in hardware. The complete design, written in VHDL and synthesized using Xilinx WebPACK 7.2 was downloaded to the Spartan 3 device for speed measurements. A 300% speed improvement compared to a software based implementation of the same algorithm was observed when the design was tested in a XC3S1000 FPGA operated with a 100 MHz clock.

引用

页码：213 / 218

页数：6

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