Fabrication and characterization of Pt/(Bi, La)4Ti3O12/Si3N4/Si metal ferroelectric insulator semiconductor structure for FET-type ferroelectric memory applications

被引:39
作者
Kijima, T
Fujisaki, Y
Ishiwara, H
机构
[1] R&D Assoc Future Electron Devices, Taito Ku, Tokyo 1100014, Japan
[2] Tokyo Inst Technol, Frontier Collaborat Res Ctr, Midori Ku, Yokohama, Kanagawa 2268503, Japan
来源
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS | 2001年 / 40卷 / 4B期
关键词
MFIS-FET; ferroelectric thin film; (Bi; La)(4)Ti3O12; La doped bismuth titanate; sol-gel;
D O I
10.1143/JJAP.40.2977
中图分类号
O59 [应用物理学];
学科分类号
摘要
For field effect transistor (FET)-type ferroelectric memories, c-axis oriented (Bi,La)(4)Ti3O12 films with small remanent polarization Pr of 4 muC/cm(2) were investigated. Bi3.25La0.75Ti3O12 films were prepared by the sol-gel method on amorphous Si3N4 layers formed on Si substrates using atomic nitrogen radicals. It was found that the films formed using stoichiometric sol-gel solution did not crystallize even after annealing at 800 degreesC in O-2 ambient. Therefore, 2.5 to 7.5% excess-Bi solutions were used and such parameters as pre annealing and crystallization temperatures, film thickness and crystallization ambient were optimized. As a result, the well c-axis-oriented Bi3.25La0.75Ti3O12 films with good crystallinity and good surface more -Si3N4/Si morphology were obtained at temperatures higher than 600 degreesC. It was also found in a Pt/100 nm-Bi3.25La0.75Ti3O12/3 nm (metal/ferroelectric/insulator/semiconductor) structure that C-V characteristics showed a hysteresis loop with a memory window of about 1 V and both high and low capacitance values kept at zero bias voltage did not change for more than 3 h.
引用
收藏
页码:2977 / 2982
页数:6
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