Mechanisms of Electromigration Damage in Cu Interconnects

被引:0
作者
Hu, C. -K. [1 ]
Gignac, L. [2 ]
Lian, G. [3 ]
Cabral, C. [2 ]
Motoyama, K. [1 ]
Shobha, H. [1 ]
Demarest, J. [1 ]
Ostrovski, Y. [1 ]
Breslin, C. M. [2 ]
Ali, M. [3 ]
Benedict, J. [3 ]
McLaughlin, P. S. [1 ]
Ni, J. [1 ]
Liu, X. H. [1 ]
机构
[1] Albany Nanotech, IBM Res, Albany, NY 12203 USA
[2] IBM TJ Watson Res Ctr, Yorktown Hts, NY USA
[3] IBM Syst, Hopewell Jct, NY USA
来源
2018 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM) | 2018年
关键词
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中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Mechanisms of electromigration (EM) damage in Cu interconnects through various CMOS nodes are reviewed. Pure Cu and Cu alloy interconnects that were used down to 14 nm node can no longer satisfy the electrical current used for 10 nm node and beyond in high-performance ICs. Cu interconnects with a metal cap should be used. Cu interface diffusivity with EM activation energy of 1.6 eV was found to be the dominate EM factor in Cu lines with a Co liner and cap. The median lifetime of 7 or 10 nm node Cu with TaN/Co liner and Co cap is predicted to be over ten thousand years at 140 degrees C with 1.5x10(7)A/cm(2). However, the resistivity size effect and the difficulty of scaling barrier/liner layer without defects can limit the Cu BEOL roadmap below the 7 nm node.
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页数:4
相关论文
共 15 条
  • [1] ELECTROMIGRATION IN THIN ALUMINUM FILMS ON TITANIUM NITRIDE
    BLECH, IA
    [J]. JOURNAL OF APPLIED PHYSICS, 1976, 47 (04) : 1203 - 1208
  • [2] Electromigration in Cu(Al) and Cu(Mn) damascene lines
    Hu, C. -K.
    Ohm, J.
    Gignac, L. M.
    Breslin, C. M.
    Mittal, S.
    Bonilla, G.
    Edelstein, D.
    Rosenberg, R.
    Choi, S.
    An, J. J.
    Simon, A. H.
    Angyal, M. S.
    Clevenger, L.
    Maniscalco, J.
    Nogami, T.
    Penny, C.
    Kim, B. Y.
    [J]. JOURNAL OF APPLIED PHYSICS, 2012, 111 (09)
  • [3] Hu C.-K., 2018, 2018 IRPS
  • [4] Hu C.K., 2013, MRS ONLINE P LIB, V1559, pmrss13, DOI [10.1557/opl.2013.872, DOI 10.1557/OPL.2013.872]
  • [5] Hu CK, 2004, 2004 IEEE INTERNATIONAL RELIABILITY PHYSICS SYMPOSIUM PROCEEDINGS, P222
  • [6] Grain growth simulation of damascene interconnects: Effect of overburden thickness
    Jung, JK
    Hwang, NM
    Park, YJ
    Joo, YC
    [J]. JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 2004, 43 (6A): : 3346 - 3352
  • [7] Li L., 2016 IEEE IEDM, P240
  • [8] PVD Cu Reflow Seed Process Optimization for Defect Reduction in Nanoscale Cu/Low-k Dual Damascene Interconnects
    Motoyama, K.
    van der Straten, O.
    Maniscalco, J.
    He, M.
    [J]. JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 2013, 160 (12) : D3211 - D3215
  • [9] Nogami T., 2015 IEEE IEDM
  • [10] Peterson N. L., 1970, J NUCL MATER, V70, P3