Neuro-inspired computing chips

被引:666
作者
Zhang, Wenqiang [1 ]
Gao, Bin [1 ,2 ]
Tang, Jianshi [1 ,2 ]
Yao, Peng [1 ]
Yu, Shimeng [3 ]
Chang, Meng-Fan [4 ]
Yoo, Hoi-Jun [5 ]
Qian, He [1 ,2 ]
Wu, Huaqiang [1 ,2 ]
机构
[1] Tsinghua Univ, Beijing Innovat Ctr Future Chips ICFC, Inst Microelect, Beijing, Peoples R China
[2] Tsinghua Univ, Beijing Natl Res Ctr Informat Sci & Technol BNRis, Beijing, Peoples R China
[3] Georgia Inst Technol, Sch Elect & Comp Engn, Atlanta, GA 30332 USA
[4] Natl Tsing Hua Univ, Dept Elect Engn, Hsinchu, Taiwan
[5] Korea Adv Inst Sci & Technol, Dept Elect Engn & Comp Sci, Daejeon, South Korea
基金
中国国家自然科学基金;
关键词
MEMRISTOR; NETWORKS; INTELLIGENCE; PROCESSOR; INFERENCE; SYSTEM;
D O I
10.1038/s41928-020-0435-7
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
The rapid development of artificial intelligence (AI) demands the rapid development of domain-specific hardware specifically designed for AI applications. Neuro-inspired computing chips integrate a range of features inspired by neurobiological systems and could provide an energy-efficient approach to AI computing workloads. Here, we review the development of neuro-inspired computing chips, including artificial neural network chips and spiking neural network chips. We propose four key metrics for benchmarking neuro-inspired computing chips - computing density, energy efficiency, computing accuracy, and on-chip learning capability - and discuss co-design principles, from the device to the algorithm level, for neuro-inspired computing chips based on non-volatile memory. We also provide a future electronic design automation tool chain and propose a roadmap for the development of large-scale neuro-inspired computing chips. This Review Article examines the development of neuro-inspired computing chips and their key benchmarking metrics, providing a co-design tool chain and proposing a roadmap for future large-scale chips.
引用
收藏
页码:371 / 382
页数:12
相关论文
共 102 条
[1]   The N3XT Approach to Energy-Efficient Abundant-Data Computing [J].
Aly, Mohamed M. Sabry ;
Wu, Tony F. ;
Bartolo, Andrew ;
Malviya, Yash H. ;
Hwang, William ;
Hills, Gage ;
Markov, Igor ;
Wootters, Mary ;
Shulaker, Max M. ;
Wong, H-S Philip ;
Mitra, Subhasish .
PROCEEDINGS OF THE IEEE, 2019, 107 (01) :19-48
[2]   Equivalent-accuracy accelerated neural-network training using analogue memory [J].
Ambrogio, Stefano ;
Narayanan, Pritish ;
Tsai, Hsinyu ;
Shelby, Robert M. ;
Boybat, Irem ;
di Nolfo, Carmelo ;
Sidler, Severin ;
Giordano, Massimo ;
Bodini, Martina ;
Farinha, Nathan C. P. ;
Killeen, Benjamin ;
Cheng, Christina ;
Jaoudi, Yassine ;
Burr, Geoffrey W. .
NATURE, 2018, 558 (7708) :60-+
[3]   Quantum Boltzmann Machine [J].
Amin, Mohammad H. ;
Andriyash, Evgeny ;
Rolfe, Jason ;
Kulchytskyy, Bohdan ;
Melko, Roger .
PHYSICAL REVIEW X, 2018, 8 (02)
[4]   PUMA: A Programmable Ultra-efficient Memristor-based Accelerator for Machine Learning Inference [J].
Ankit, Aayush ;
El Hajj, Izzat ;
Chalamalasetti, Sai Rahul ;
Ndu, Geoffrey ;
Foltin, Martin ;
Williams, R. Stanley ;
Faraboschi, Paolo ;
Hwu, Wen-mei ;
Strachan, John Paul ;
Roy, Kaushik ;
Milojicic, Dejan S. .
TWENTY-FOURTH INTERNATIONAL CONFERENCE ON ARCHITECTURAL SUPPORT FOR PROGRAMMING LANGUAGES AND OPERATING SYSTEMS (ASPLOS XXIV), 2019, :715-731
[5]  
[Anonymous], 2018, PROC IEEE INT S CIRC, DOI DOI 10.1109/ISCAS.2018.8351075
[6]   Quantum supremacy using a programmable superconducting processor [J].
Arute, Frank ;
Arya, Kunal ;
Babbush, Ryan ;
Bacon, Dave ;
Bardin, Joseph C. ;
Barends, Rami ;
Biswas, Rupak ;
Boixo, Sergio ;
Brandao, Fernando G. S. L. ;
Buell, David A. ;
Burkett, Brian ;
Chen, Yu ;
Chen, Zijun ;
Chiaro, Ben ;
Collins, Roberto ;
Courtney, William ;
Dunsworth, Andrew ;
Farhi, Edward ;
Foxen, Brooks ;
Fowler, Austin ;
Gidney, Craig ;
Giustina, Marissa ;
Graff, Rob ;
Guerin, Keith ;
Habegger, Steve ;
Harrigan, Matthew P. ;
Hartmann, Michael J. ;
Ho, Alan ;
Hoffmann, Markus ;
Huang, Trent ;
Humble, Travis S. ;
Isakov, Sergei V. ;
Jeffrey, Evan ;
Jiang, Zhang ;
Kafri, Dvir ;
Kechedzhi, Kostyantyn ;
Kelly, Julian ;
Klimov, Paul V. ;
Knysh, Sergey ;
Korotkov, Alexander ;
Kostritsa, Fedor ;
Landhuis, David ;
Lindmark, Mike ;
Lucero, Erik ;
Lyakh, Dmitry ;
Mandra, Salvatore ;
McClean, Jarrod R. ;
McEwen, Matthew ;
Megrant, Anthony ;
Mi, Xiao .
NATURE, 2019, 574 (7779) :505-+
[7]   Neurogrid: A Mixed-Analog-Digital Multichip System for Large-Scale Neural Simulations [J].
Benjamin, Ben Varkey ;
Gao, Peiran ;
McQuinn, Emmett ;
Choudhary, Swadesh ;
Chandrasekaran, Anand R. ;
Bussat, Jean-Marie ;
Alvarez-Icaza, Rodrigo ;
Arthur, John V. ;
Merolla, Paul A. ;
Boahen, Kwabena .
PROCEEDINGS OF THE IEEE, 2014, 102 (05) :699-716
[8]  
Biswas A, 2018, ISSCC DIG TECH PAP I, P488, DOI 10.1109/ISSCC.2018.8310397
[9]   Neuromorphic computing with multi-memristive synapses [J].
Boybat, Irem ;
Le Gallo, Manuel ;
Nandakumar, S. R. ;
Moraitis, Timoleon ;
Parnell, Thomas ;
Tuma, Tomas ;
Rajendran, Bipin ;
Leblebici, Yusuf ;
Sebastian, Abu ;
Eleftheriou, Evangelos .
NATURE COMMUNICATIONS, 2018, 9
[10]   A fully integrated reprogrammable memristor-CMOS system for efficient multiply-accumulate operations [J].
Cai, Fuxi ;
Correll, Justin M. ;
Lee, Seung Hwan ;
Lim, Yong ;
Bothra, Vishishtha ;
Zhang, Zhengya ;
Flynn, Michael P. ;
Lu, Wei D. .
NATURE ELECTRONICS, 2019, 2 (07) :290-299