A new analytical drain current model of cylindrical gate silicon tunnel FET with source δ-doping

A new delta-doped cylindrical gate silicon tunnel FET (DCG-TFET) analytical model is developed and investigated extensively, with the aim of addressing the challenges of the conventional CG-TFET. The improvement in tunneling probability of charge carriers has been achieved by inserting a delta-doping sheet in the source region which leads to high drain current as compared to CG-TFET. The effect of distance between the delta-doping sheet and source/channel interface on the current performance, sub-threshold swing (SS) and threshold voltage (V-th) has been examined. The instantaneous position of delta-doping region from the tunneling junction is optimized based on the trade-off between current ratio and SS. The present model exhibit maximum switching current ratio (I-ON/I-OFF congruent to 10(12)) for an optimum distance of 2 nm without degrading SS (SS similar to 55 mV/decade) and V-th performance. The electrostatic behavior of the present model is obtained using the solution of Poisson's equation in the cylindrical coordinate system. However the impact of scaling of the gate oxide thickness and cylindrical pillar diameter on drain current performance has been discussed. In future, DCG-TFET can be one of the potential successors for ultra-low-power applications because of its improved drain current and switching ratio. (C) 2016 Elsevier Ltd. All rights reserved.