RF Analysis of a Fully Gate Covered Junctionless FinFET for Improved Performance

被引:0
|
作者
Tyagi, Aman [1 ]
Mangal, Gaurav [1 ]
Chaujar, Rishu [1 ]
机构
[1] Delhi Technol Univ, Dept Appl Phys, Delhi 110042, India
来源
PROCEEDINGS OF 3RD IEEE CONFERENCE ON VLSI DEVICE, CIRCUIT AND SYSTEM (IEEE VLSI DCS 2022) | 2022年
关键词
AC analysis; RF performance; Junctionless FinFET; Fully-gated FinFET; TCAD simulation;
D O I
10.1109/VLSIDCS53788.2022.9811481
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This work is an analysis of various RF performance figure of merits of a fully gate-covered Junctionless FinFET at two gate lengths (20nm and 40nm) with a high-k dielectric layer as gate oxide and is compared to a conventional FinFET. The simulation results exhibit great performance increment for the smaller 20nm device in terms of cutoff frequency(fT) which shows about 20% increase, the maximum oscillation frequency (fmax) which is also amplified by more than five times. Other RF parameters such as Gain Frequency Product (GFP) and Transconductance Frequency Product (TFP) for the 20 nm device, also exhibited a considerable increment over the conventional device. Gain transconductance frequency Product (GTFP) was also observed to be enhanced by more than 2 times. All these parameters make the device an attractive candidate for RF applications.
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页码:93 / 97
页数:5
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